Japanese Patent Application Publication No. 2013-102081 describes a semiconductor device. This semiconductor device includes a semiconductor substrate, and a Schottky electrode provided on an upper surface of the semiconductor substrate. The upper surface of the semiconductor substrate is provided with a so-called mesa structure. That is, the upper surface of the semiconductor substrate includes a first region and a second region surrounding the first region, and the first region is located higher than the second region, with a rising surface provided between the first region and the second region. The Schottky electrode is provided on the first region, and a high resistivity layer facing an outer peripheral edge of the Schottky electrode is provided on an outer peripheral portion of the first region. According to such a structure, electric field concentration in a vicinity of the outer peripheral edge of the Schottky electrode is alleviated, which improves breakdown voltage of the semiconductor device.
Japanese Patent Application Publication No. 2013-102081 further describes another semiconductor device that does not have such a mesa structure. In this semiconductor device, an outer peripheral portion of the Schottky electrode faces the semiconductor substrate via an insulating film. According to such a configuration, the outer peripheral portion of the Schottky electrode functions as a field plate electrode, and the electric field concentration in the vicinity of the outer peripheral edge within a range making Schottky contact is alleviated by a field plate effect. Due to this, the breakdown voltage of the semiconductor device is improved.